Tim Pruss , Priyank Kalla , Senior Member , IEEE , and

Abstraction plays an important role in digital design, analysis and verification. This paper introduces a word-level abstraction of the function implemented by a combinational logic circuit. The abstraction provides a canonical representation of the function as a polynomial Z =F (A) over the finite field F2k , where Z,A represent the k-bit word-level output and input of the circuit, respectively. This canonical abstraction can be utilized for formal verification and equivalence checking of combinational circuits. Our approach to abstraction is based upon concepts from computational commutative algebra and algebraic geometry. We show that the abstraction Z = F (A) can be derived by computing a Gröbner basis of the polynomials corresponding to the circuit, using a specific elimination term order derived from the circuit’s topology. Computing Gröbner bases using elimination term orders is infeasible for large circuits. To overcome this limitation, we describe an efficient symbolic computation to derive the wordlevel polynomial. Our algorithms exploit i) the structure of the circuit, ii) the properties of Gröbner bases, iii) characteristics of finite fields F2k , and iv) modern algorithms from symbolic algebra, to derive the canonical polynomial representation. A standalone customized tool is developed that implements these concepts to derive the polynomial abstraction. This approach and our tool are used to verify (and detect bugs in) combinational finite field arithmetic circuits – with up to 1024bit operands – whereas contemporary verification techniques are infeasible. Keywords-Word-Level Abstraction, Formal Verification, Equivalence Checking, Gröbner Bases, Finite Fields.